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fix spi
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parent
f52e76381b
commit
1e4d32e0ea
2 changed files with 14 additions and 20 deletions
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@ -1,40 +1,37 @@
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import re
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from esphome import pins
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import esphome.codegen as cg
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import esphome.config_validation as cv
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import esphome.final_validate as fv
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from esphome.components.esp32.const import (
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KEY_ESP32,
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VARIANT_ESP32S2,
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VARIANT_ESP32S3,
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VARIANT_ESP32C2,
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VARIANT_ESP32C3,
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VARIANT_ESP32C6,
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VARIANT_ESP32H2,
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VARIANT_ESP32S2,
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VARIANT_ESP32S3,
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)
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from esphome import pins
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import esphome.config_validation as cv
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from esphome.const import (
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CONF_CLK_PIN,
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CONF_CS_PIN,
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CONF_DATA_PINS,
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CONF_DATA_RATE,
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CONF_ID,
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CONF_INVERTED,
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CONF_MISO_PIN,
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CONF_MOSI_PIN,
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CONF_SPI_ID,
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CONF_CS_PIN,
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CONF_NUMBER,
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CONF_INVERTED,
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CONF_SPI_ID,
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KEY_CORE,
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KEY_TARGET_PLATFORM,
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KEY_VARIANT,
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CONF_DATA_RATE,
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PLATFORM_ESP32,
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PLATFORM_ESP8266,
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PLATFORM_RP2040,
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CONF_DATA_PINS,
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)
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from esphome.core import (
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coroutine_with_priority,
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CORE,
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)
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from esphome.core import CORE, coroutine_with_priority
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import esphome.final_validate as fv
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CODEOWNERS = ["@esphome/core", "@clydebarrow"]
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spi_ns = cg.esphome_ns.namespace("spi")
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@ -96,11 +93,7 @@ RP_SPI_PINSETS = [
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def get_target_platform():
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return (
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CORE.data[KEY_CORE][KEY_TARGET_PLATFORM]
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if KEY_TARGET_PLATFORM in CORE.data[KEY_CORE]
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else ""
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)
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return CORE.data[KEY_CORE][KEY_TARGET_PLATFORM]
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def get_target_variant():
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@ -299,7 +299,8 @@ def preload_core_config(config, result) -> str:
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# Insert generated target platform config to main config
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config[plat] = plat_conf
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config[CONF_ESPHOME] = conf
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return newstyle_found[0] if newstyle_found else plat
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target_platform = newstyle_found[0] if newstyle_found else plat
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return target_platform
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def include_file(path, basename):
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