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add support for SN74HC595 shift register (#1083)
* add support for SN74HC595 shift register * fix linter errors * more linter reported issues fixed * hopefully last linter error cleanup * one more linter fix * looks like the linter is always keeping stuff for later, is this the final fix? * add test Co-authored-by: Guillermo Ruffino <glm.net@gmail.com>
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parent
ca4107d450
commit
3c9712d683
4 changed files with 198 additions and 3 deletions
54
esphome/components/sn74hc595/__init__.py
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54
esphome/components/sn74hc595/__init__.py
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import esphome.codegen as cg
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import esphome.config_validation as cv
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from esphome import pins
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from esphome.const import CONF_ID, CONF_NUMBER, CONF_INVERTED, CONF_DATA_PIN, CONF_CLOCK_PIN
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DEPENDENCIES = []
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MULTI_CONF = True
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sn74hc595_ns = cg.esphome_ns.namespace('sn74hc595')
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SN74HC595Component = sn74hc595_ns.class_('SN74HC595Component', cg.Component)
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SN74HC595GPIOPin = sn74hc595_ns.class_('SN74HC595GPIOPin', cg.GPIOPin)
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CONF_SN74HC595 = 'sn74hc595'
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CONF_LATCH_PIN = 'latch_pin'
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CONF_OE_PIN = 'oe_pin'
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CONF_SR_COUNT = 'sr_count'
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CONFIG_SCHEMA = cv.Schema({
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cv.Required(CONF_ID): cv.declare_id(SN74HC595Component),
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cv.Required(CONF_DATA_PIN): pins.gpio_output_pin_schema,
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cv.Required(CONF_CLOCK_PIN): pins.gpio_output_pin_schema,
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cv.Required(CONF_LATCH_PIN): pins.gpio_output_pin_schema,
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cv.Optional(CONF_OE_PIN): pins.gpio_output_pin_schema,
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cv.Optional(CONF_SR_COUNT, default=1): cv.int_range(1, 4)
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}).extend(cv.COMPONENT_SCHEMA)
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def to_code(config):
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var = cg.new_Pvariable(config[CONF_ID])
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yield cg.register_component(var, config)
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data_pin = yield cg.gpio_pin_expression(config[CONF_DATA_PIN])
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cg.add(var.set_data_pin(data_pin))
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clock_pin = yield cg.gpio_pin_expression(config[CONF_CLOCK_PIN])
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cg.add(var.set_clock_pin(clock_pin))
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latch_pin = yield cg.gpio_pin_expression(config[CONF_LATCH_PIN])
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cg.add(var.set_latch_pin(latch_pin))
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oe_pin = yield cg.gpio_pin_expression(config[CONF_OE_PIN])
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cg.add(var.set_oe_pin(oe_pin))
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cg.add(var.set_sr_count(config[CONF_SR_COUNT]))
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SN74HC595_OUTPUT_PIN_SCHEMA = cv.Schema({
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cv.Required(CONF_SN74HC595): cv.use_id(SN74HC595Component),
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cv.Required(CONF_NUMBER): cv.int_,
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cv.Optional(CONF_INVERTED, default=False): cv.boolean,
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})
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SN74HC595_INPUT_PIN_SCHEMA = cv.Schema({})
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@pins.PIN_SCHEMA_REGISTRY.register(CONF_SN74HC595,
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(SN74HC595_OUTPUT_PIN_SCHEMA, SN74HC595_INPUT_PIN_SCHEMA))
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def sn74hc595_pin_to_code(config):
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parent = yield cg.get_variable(config[CONF_SN74HC595])
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yield SN74HC595GPIOPin.new(parent, config[CONF_NUMBER], config[CONF_INVERTED])
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70
esphome/components/sn74hc595/sn74hc595.cpp
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70
esphome/components/sn74hc595/sn74hc595.cpp
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#include "sn74hc595.h"
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#include "esphome/core/log.h"
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namespace esphome {
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namespace sn74hc595 {
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static const char *TAG = "sn74hc595";
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void SN74HC595Component::setup() {
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ESP_LOGCONFIG(TAG, "Setting up SN74HC595...");
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if (this->have_oe_pin_) { // disable output
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pinMode(this->oe_pin_->get_pin(), OUTPUT);
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digitalWrite(this->oe_pin_->get_pin(), HIGH);
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}
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// initialize output pins
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pinMode(this->clock_pin_->get_pin(), OUTPUT);
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pinMode(this->data_pin_->get_pin(), OUTPUT);
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pinMode(this->latch_pin_->get_pin(), OUTPUT);
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digitalWrite(this->clock_pin_->get_pin(), LOW);
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digitalWrite(this->data_pin_->get_pin(), LOW);
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digitalWrite(this->latch_pin_->get_pin(), LOW);
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// send state to shift register
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this->write_gpio_();
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}
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void SN74HC595Component::dump_config() { ESP_LOGCONFIG(TAG, "SN74HC595:"); }
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bool SN74HC595Component::digital_read_(uint8_t pin) { return bitRead(this->output_bits_, pin); }
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void SN74HC595Component::digital_write_(uint8_t pin, bool value) {
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bitWrite(this->output_bits_, pin, value);
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this->write_gpio_();
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}
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bool SN74HC595Component::write_gpio_() {
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for (int i = this->sr_count_ - 1; i >= 0; i--) {
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uint8_t data = (uint8_t)(this->output_bits_ >> (8 * i) & 0xff);
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shiftOut(this->data_pin_->get_pin(), this->clock_pin_->get_pin(), MSBFIRST, data);
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}
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// pulse latch to activate new values
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digitalWrite(this->latch_pin_->get_pin(), HIGH);
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digitalWrite(this->latch_pin_->get_pin(), LOW);
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// enable output if configured
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if (this->have_oe_pin_) {
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digitalWrite(this->oe_pin_->get_pin(), LOW);
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}
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return true;
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}
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float SN74HC595Component::get_setup_priority() const { return setup_priority::IO; }
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void SN74HC595GPIOPin::setup() {}
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bool SN74HC595GPIOPin::digital_read() { return this->parent_->digital_read_(this->pin_) != this->inverted_; }
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void SN74HC595GPIOPin::digital_write(bool value) {
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this->parent_->digital_write_(this->pin_, value != this->inverted_);
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}
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SN74HC595GPIOPin::SN74HC595GPIOPin(SN74HC595Component *parent, uint8_t pin, bool inverted)
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: GPIOPin(pin, OUTPUT, inverted), parent_(parent) {}
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} // namespace sn74hc595
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} // namespace esphome
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55
esphome/components/sn74hc595/sn74hc595.h
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55
esphome/components/sn74hc595/sn74hc595.h
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#pragma once
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#include "esphome/core/component.h"
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#include "esphome/core/esphal.h"
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namespace esphome {
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namespace sn74hc595 {
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class SN74HC595Component : public Component {
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public:
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SN74HC595Component() = default;
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void setup() override;
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float get_setup_priority() const override;
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void dump_config() override;
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void set_data_pin(GPIOPin *pin) { data_pin_ = pin; }
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void set_clock_pin(GPIOPin *pin) { clock_pin_ = pin; }
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void set_latch_pin(GPIOPin *pin) { latch_pin_ = pin; }
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void set_oe_pin(GPIOPin *pin) {
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oe_pin_ = pin;
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have_oe_pin_ = true;
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}
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void set_sr_count(uint8_t count) { sr_count_ = count; }
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protected:
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friend class SN74HC595GPIOPin;
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bool digital_read_(uint8_t pin);
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void digital_write_(uint8_t pin, bool value);
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bool write_gpio_();
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GPIOPin *data_pin_;
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GPIOPin *clock_pin_;
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GPIOPin *latch_pin_;
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GPIOPin *oe_pin_;
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uint8_t sr_count_;
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bool have_oe_pin_{false};
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uint32_t output_bits_{0x00};
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};
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/// Helper class to expose a SC74HC595 pin as an internal output GPIO pin.
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class SN74HC595GPIOPin : public GPIOPin {
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public:
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SN74HC595GPIOPin(SN74HC595Component *parent, uint8_t pin, bool inverted = false);
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void setup() override;
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bool digital_read() override;
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void digital_write(bool value) override;
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protected:
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SN74HC595Component *parent_;
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};
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} // namespace sn74hc595
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} // namespace esphome
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@ -1465,6 +1465,14 @@ switch:
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id: my_stepper
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position: 0
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- platform: gpio
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name: "SN74HC595 Pin #0"
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pin:
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sn74hc595: sn74hc595_hub
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# Use pin number 0
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number: 0
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inverted: False
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fan:
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- platform: binary
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output: gpio_26
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name: "BSSID"
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mac_address:
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name: "Mac Address"
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sn74hc595:
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- id: 'sn74hc595_hub'
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data_pin: GPIO21
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clock_pin: GPIO23
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latch_pin: GPIO22
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oe_pin: GPIO32
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sr_count: 2
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