SPI schema now uses typed_schema with type key (#6353)

This commit is contained in:
Clyde Stubbs 2024-03-12 13:50:24 +11:00 committed by GitHub
parent 51ab15c40e
commit 782d662c20
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GPG key ID: B5690EEEBB952194
3 changed files with 39 additions and 18 deletions

View file

@ -32,7 +32,10 @@ from esphome.const import (
CONF_ALLOW_OTHER_USES,
CONF_DATA_PINS,
)
from esphome.core import coroutine_with_priority, CORE
from esphome.core import (
coroutine_with_priority,
CORE,
)
CODEOWNERS = ["@esphome/core", "@clydebarrow"]
spi_ns = cg.esphome_ns.namespace("spi")
@ -73,6 +76,8 @@ CONF_SPI_MODE = "spi_mode"
CONF_FORCE_SW = "force_sw"
CONF_INTERFACE = "interface"
CONF_INTERFACE_INDEX = "interface_index"
TYPE_SINGLE = "single"
TYPE_QUAD = "quad"
# RP2040 SPI pin assignments are complicated;
# refer to GPIO function select table in https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf
@ -297,18 +302,19 @@ SPI_QUAD_SCHEMA = cv.All(
),
}
),
cv.only_on([PLATFORM_ESP32]),
cv.only_with_esp_idf,
)
CONFIG_SCHEMA = cv.All(
# Order is important. SPI_SCHEMA is the default.
cv.ensure_list(
cv.Any(
SPI_SCHEMA,
SPI_QUAD_SCHEMA,
msg="Standard SPI requires mosi_pin and/or miso_pin; quad SPI requires data_pins only."
+ " A clock pin is always required",
),
cv.typed_schema(
{
TYPE_SINGLE: SPI_SCHEMA,
TYPE_QUAD: SPI_QUAD_SCHEMA,
},
default_type=TYPE_SINGLE,
)
),
validate_spi_config,
)

View file

@ -0,0 +1,23 @@
spi:
- id: spi_id_1
type: single
clk_pin:
number: GPIO7
allow_other_uses: false
mosi_pin: GPIO6
interface: hardware
- id: quad_spi
type: quad
clk_pin: 47
interface: spi3
data_pins:
- number: 40
allow_other_uses: false
- 41
- 42
- 43
- id: spi_id_3
clk_pin: 8
mosi_pin: 9
interface: any

View file

@ -23,20 +23,12 @@ psram:
spi:
- id: spi_id_1
type: single
clk_pin:
number: GPIO7
allow_other_uses: false
mosi_pin: GPIO6
interface: any
- id: quad_spi
clk_pin: 47
data_pins:
- number: 40
allow_other_uses: false
- 41
- 42
- 43
interface: hardware
spi_device:
id: spidev
data_rate: 2MHz