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Add sx127x component
This commit is contained in:
Jonathan Swoboda
parent
4ece4a389e
commit
89d6df58c5
3 changed files with 438 additions and 0 deletions
125
esphome/components/sx127x/__init__.py
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125
esphome/components/sx127x/__init__.py
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from esphome import pins
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import esphome.codegen as cg
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from esphome.components import spi
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import esphome.config_validation as cv
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from esphome.const import CONF_FREQUENCY, CONF_ID
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CODEOWNERS = ["@swoboda1337"]
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DEPENDENCIES = ["spi"]
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CONF_PA_POWER = "pa_power"
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CONF_PA_PIN = "pa_pin"
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CONF_NSS_PIN = "nss_pin"
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CONF_RST_PIN = "rst_pin"
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CONF_MODULATION = "modulation"
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CONF_RX_FLOOR = "rx_floor"
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CONF_RX_START = "rx_start"
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CONF_RX_BANDWIDTH = "rx_bandwidth"
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CONF_FSK_FDEV = "fsk_fdev"
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CONF_FSK_RAMP = "fsk_ramp"
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CONF_FSK_SHAPING = "fsk_shaping"
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sx127x_ns = cg.esphome_ns.namespace("sx127x")
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SX127x = sx127x_ns.class_("SX127x", cg.Component, spi.SPIDevice)
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SX127xOpMode = sx127x_ns.enum("SX127xOpMode")
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SX127xRxBw = sx127x_ns.enum("SX127xRxBw")
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SX127xPaConfig = sx127x_ns.enum("SX127xPaConfig")
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SX127xPaRamp = sx127x_ns.enum("SX127xPaRamp")
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PA_PIN = {
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"RFO": SX127xPaConfig.PA_PIN_RFO,
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"BOOST": SX127xPaConfig.PA_PIN_BOOST,
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}
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SHAPING = {
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"BT_0_3": SX127xPaRamp.SHAPING_BT_0_3,
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"BT_0_5": SX127xPaRamp.SHAPING_BT_0_5,
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"BT_1_0": SX127xPaRamp.SHAPING_BT_1_0,
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"NONE": SX127xPaRamp.SHAPING_NONE,
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}
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RAMP = {
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"10us": SX127xPaRamp.PA_RAMP_10,
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"12us": SX127xPaRamp.PA_RAMP_12,
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"15us": SX127xPaRamp.PA_RAMP_15,
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"20us": SX127xPaRamp.PA_RAMP_20,
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"25us": SX127xPaRamp.PA_RAMP_25,
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"31us": SX127xPaRamp.PA_RAMP_31,
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"40us": SX127xPaRamp.PA_RAMP_40,
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"50us": SX127xPaRamp.PA_RAMP_50,
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"62us": SX127xPaRamp.PA_RAMP_62,
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"100us": SX127xPaRamp.PA_RAMP_100,
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"125us": SX127xPaRamp.PA_RAMP_125,
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"250us": SX127xPaRamp.PA_RAMP_250,
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"500us": SX127xPaRamp.PA_RAMP_500,
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"1000us": SX127xPaRamp.PA_RAMP_1000,
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"2000us": SX127xPaRamp.PA_RAMP_2000,
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"3400us": SX127xPaRamp.PA_RAMP_3400,
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}
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MOD = {
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"FSK": SX127xOpMode.MOD_FSK,
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"OOK": SX127xOpMode.MOD_OOK,
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}
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RX_BW = {
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"2_6kHz": SX127xRxBw.RX_BW_2_6,
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"3_1kHz": SX127xRxBw.RX_BW_3_1,
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"3_9kHz": SX127xRxBw.RX_BW_3_9,
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"5_2kHz": SX127xRxBw.RX_BW_5_2,
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"6_3kHz": SX127xRxBw.RX_BW_6_3,
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"7_8kHz": SX127xRxBw.RX_BW_7_8,
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"10_4kHz": SX127xRxBw.RX_BW_10_4,
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"12_5kHz": SX127xRxBw.RX_BW_12_5,
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"15_6kHz": SX127xRxBw.RX_BW_15_6,
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"20_8kHz": SX127xRxBw.RX_BW_20_8,
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"25_0kHz": SX127xRxBw.RX_BW_25_0,
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"31_3kHz": SX127xRxBw.RX_BW_31_3,
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"41_7kHz": SX127xRxBw.RX_BW_41_7,
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"50_0kHz": SX127xRxBw.RX_BW_50_0,
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"62_5kHz": SX127xRxBw.RX_BW_62_5,
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"83_3kHz": SX127xRxBw.RX_BW_83_3,
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"100_0kHz": SX127xRxBw.RX_BW_100_0,
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"125_0kHz": SX127xRxBw.RX_BW_125_0,
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"166_7kHz": SX127xRxBw.RX_BW_166_7,
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"200_0kHz": SX127xRxBw.RX_BW_200_0,
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"250_0kHz": SX127xRxBw.RX_BW_250_0,
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}
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CONFIG_SCHEMA = cv.Schema(
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{
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cv.GenerateID(): cv.declare_id(SX127x),
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cv.Required(CONF_RST_PIN): pins.internal_gpio_output_pin_schema,
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cv.Required(CONF_NSS_PIN): pins.internal_gpio_output_pin_schema,
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cv.Required(CONF_FREQUENCY): cv.int_range(min=137000000, max=1020000000),
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cv.Required(CONF_MODULATION): cv.enum(MOD),
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cv.Optional(CONF_FSK_FDEV, default=5000): cv.int_range(min=0, max=100000),
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cv.Optional(CONF_FSK_RAMP, default="40us"): cv.enum(RAMP),
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cv.Optional(CONF_FSK_SHAPING, default="NONE"): cv.enum(SHAPING),
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cv.Optional(CONF_RX_FLOOR, default=-94): cv.float_range(min=-128, max=-1),
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cv.Optional(CONF_RX_START, default=True): cv.boolean,
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cv.Optional(CONF_RX_BANDWIDTH, default="50_0kHz"): cv.enum(RX_BW),
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cv.Optional(CONF_PA_PIN, default="BOOST"): cv.enum(PA_PIN),
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cv.Optional(CONF_PA_POWER, default=17): cv.int_range(min=0, max=17),
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}
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).extend(spi.spi_device_schema(False, 8e6, "mode0"))
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async def to_code(config):
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var = cg.new_Pvariable(config[CONF_ID])
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await cg.register_component(var, config)
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await spi.register_spi_device(var, config)
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rst_pin = await cg.gpio_pin_expression(config[CONF_RST_PIN])
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cg.add(var.set_rst_pin(rst_pin))
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nss_pin = await cg.gpio_pin_expression(config[CONF_NSS_PIN])
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cg.add(var.set_nss_pin(nss_pin))
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cg.add(var.set_frequency(config[CONF_FREQUENCY]))
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cg.add(var.set_modulation(config[CONF_MODULATION]))
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cg.add(var.set_rx_floor(config[CONF_RX_FLOOR]))
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cg.add(var.set_rx_start(config[CONF_RX_START]))
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cg.add(var.set_rx_bandwidth(config[CONF_RX_BANDWIDTH]))
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cg.add(var.set_pa_pin(config[CONF_PA_PIN]))
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cg.add(var.set_pa_power(config[CONF_PA_POWER]))
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cg.add(var.set_fsk_fdev(config[CONF_FSK_FDEV]))
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cg.add(var.set_fsk_ramp(config[CONF_FSK_RAMP]))
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cg.add(var.set_fsk_shaping(config[CONF_FSK_SHAPING]))
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155
esphome/components/sx127x/sx127x.cpp
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155
esphome/components/sx127x/sx127x.cpp
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#include "sx127x.h"
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namespace esphome {
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namespace sx127x {
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static const char *const TAG = "sx127x";
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uint8_t SX127x::read_register_(uint8_t reg) { return this->single_transfer_((uint8_t) reg & 0x7f, 0x00); }
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void SX127x::write_register_(uint8_t reg, uint8_t value) { this->single_transfer_((uint8_t) reg | 0x80, value); }
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uint8_t SX127x::single_transfer_(uint8_t reg, uint8_t value) {
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uint8_t response;
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this->delegate_->begin_transaction();
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this->nss_pin_->digital_write(false);
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this->delegate_->transfer(reg);
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response = this->delegate_->transfer(value);
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this->nss_pin_->digital_write(true);
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this->delegate_->end_transaction();
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return response;
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}
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void SX127x::setup() {
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ESP_LOGCONFIG(TAG, "Setting up SX127x...");
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// setup nss and set high
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this->nss_pin_->setup();
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this->nss_pin_->digital_write(true);
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// setup reset
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this->rst_pin_->setup();
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// start spi
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this->spi_setup();
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// configure rf
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this->configure();
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}
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void SX127x::configure() {
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// toggle chip reset
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this->rst_pin_->digital_write(false);
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delay(1);
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this->rst_pin_->digital_write(true);
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delay(10);
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// check silicon version to make sure hw is ok
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if (this->read_register_(REG_VERSION) != 0x12) {
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this->mark_failed();
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return;
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}
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// set modulation and make sure transceiver is in sleep mode
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this->write_register_(REG_OP_MODE, this->modulation_ | MODE_LF_ON | MODE_SLEEP);
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delay(1);
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// set freq
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uint64_t frf = ((uint64_t) this->frequency_ << 19) / 32000000;
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this->write_register_(REG_FRF_MSB, (uint8_t) ((frf >> 16) & 0xFF));
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this->write_register_(REG_FRF_MID, (uint8_t) ((frf >> 8) & 0xFF));
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this->write_register_(REG_FRF_LSB, (uint8_t) ((frf >> 0) & 0xFF));
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// set fdev
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uint32_t fdev = std::min(this->fsk_fdev_ / 61, 0x3FFFu);
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this->write_register_(REG_FDEV_MSB, (uint8_t) ((fdev >> 8) & 0xFF));
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this->write_register_(REG_FDEV_LSB, (uint8_t) ((fdev >> 0) & 0xFF));
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// set the channel bw
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this->write_register_(REG_RX_BW, this->rx_bandwidth_);
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// config pa
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if (this->pa_pin_ == PA_PIN_BOOST) {
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this->pa_power_ = std::max(this->pa_power_, 2u);
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this->pa_power_ = std::min(this->pa_power_, 17u);
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this->write_register_(REG_PA_CONFIG, (this->pa_power_ - 2) | this->pa_pin_ | PA_MAX_POWER);
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} else {
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this->pa_power_ = std::min(this->pa_power_, 14u);
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this->write_register_(REG_PA_CONFIG, (this->pa_power_ - 0) | this->pa_pin_ | PA_MAX_POWER);
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}
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if (this->modulation_ == MOD_FSK) {
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this->write_register_(REG_PA_RAMP, this->fsk_ramp_ | this->fsk_shaping_);
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} else {
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this->write_register_(REG_PA_RAMP, this->fsk_ramp_);
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}
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// disable packet mode
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this->write_register_(REG_PACKET_CONFIG_1, 0x00);
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this->write_register_(REG_PACKET_CONFIG_2, 0x00);
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// disable bit synchronizer, disable sync generation and setup threshold
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this->write_register_(REG_SYNC_CONFIG, 0x00);
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this->write_register_(REG_OOK_PEAK, OOK_THRESH_STEP_0_5 | OOK_THRESH_PEAK);
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this->write_register_(REG_OOK_AVG, OOK_THRESH_DEC_1_8);
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// set ook floor
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this->write_register_(REG_OOK_FIX, 256 + int(this->rx_floor_ * 2.0));
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// enable standby mode
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this->set_mode_standby();
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delay(1);
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// enable rx mode
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if (this->rx_start_) {
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this->set_mode_rx();
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delay(1);
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}
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}
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void SX127x::set_mode_standby() { this->write_register_(REG_OP_MODE, this->modulation_ | MODE_LF_ON | MODE_STDBY); }
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void SX127x::set_mode_rx() {
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this->write_register_(REG_OP_MODE, this->modulation_ | MODE_LF_ON | MODE_RX_FS);
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delay(1);
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this->write_register_(REG_OP_MODE, this->modulation_ | MODE_LF_ON | MODE_RX);
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}
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void SX127x::set_mode_tx() {
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this->write_register_(REG_OP_MODE, this->modulation_ | MODE_LF_ON | MODE_TX_FS);
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delay(1);
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this->write_register_(REG_OP_MODE, this->modulation_ | MODE_LF_ON | MODE_TX);
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}
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void SX127x::dump_config() {
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static const uint16_t RAMP_LUT[16] = {3400, 2000, 1000, 500, 250, 125, 100, 62, 50, 40, 31, 25, 20, 15, 12, 10};
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uint32_t rx_bw_mant = 16 + (this->rx_bandwidth_ >> 3) * 4;
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uint32_t rx_bw_exp = this->rx_bandwidth_ & 0x7;
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float rx_bw = (float) 32000000 / (rx_bw_mant * (1 << (rx_bw_exp + 2)));
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ESP_LOGCONFIG(TAG, "SX127x:");
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LOG_PIN(" NSS Pin: ", this->nss_pin_);
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LOG_PIN(" RST Pin: ", this->rst_pin_);
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ESP_LOGCONFIG(TAG, " PA Pin: %s", this->pa_pin_ == PA_PIN_BOOST ? "BOOST" : "RFO");
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ESP_LOGCONFIG(TAG, " PA Power: %d dBm", this->pa_power_);
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ESP_LOGCONFIG(TAG, " Frequency: %f MHz", (float) this->frequency_ / 1000000);
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ESP_LOGCONFIG(TAG, " Modulation: %s", this->modulation_ == MOD_FSK ? "FSK" : "OOK");
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ESP_LOGCONFIG(TAG, " Rx Bandwidth: %.1f kHz", (float) rx_bw / 1000);
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ESP_LOGCONFIG(TAG, " Rx Start: %s", this->rx_start_ ? "true" : "false");
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ESP_LOGCONFIG(TAG, " Rx Floor: %.1f dBm", this->rx_floor_);
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ESP_LOGCONFIG(TAG, " FSK Fdev: %d Hz", this->fsk_fdev_);
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ESP_LOGCONFIG(TAG, " FSK Ramp: %d us", RAMP_LUT[this->fsk_ramp_]);
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if (this->fsk_shaping_ == SHAPING_BT_1_0) {
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ESP_LOGCONFIG(TAG, " FSK Shaping: BT_1_0");
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} else if (this->fsk_shaping_ == SHAPING_BT_0_5) {
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ESP_LOGCONFIG(TAG, " FSK Shaping: BT_0_5");
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} else if (this->fsk_shaping_ == SHAPING_BT_0_3) {
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ESP_LOGCONFIG(TAG, " FSK Shaping: BT_0_3");
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} else {
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ESP_LOGCONFIG(TAG, " FSK Shaping: NONE");
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}
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if (this->is_failed()) {
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ESP_LOGE(TAG, "Configuring SX127x failed");
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}
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}
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} // namespace sx127x
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} // namespace esphome
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158
esphome/components/sx127x/sx127x.h
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158
esphome/components/sx127x/sx127x.h
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#pragma once
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#include "esphome/components/spi/spi.h"
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namespace esphome {
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namespace sx127x {
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enum SX127xReg : uint8_t {
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REG_OP_MODE = 0x01,
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REG_FDEV_MSB = 0x04,
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REG_FDEV_LSB = 0x05,
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REG_FRF_MSB = 0x06,
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REG_FRF_MID = 0x07,
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REG_FRF_LSB = 0x08,
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REG_PA_CONFIG = 0x09,
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REG_PA_RAMP = 0x0A,
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REG_RX_BW = 0x12,
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REG_OOK_PEAK = 0x14,
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REG_OOK_FIX = 0x15,
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REG_OOK_AVG = 0x16,
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REG_SYNC_CONFIG = 0x27,
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REG_PACKET_CONFIG_1 = 0x30,
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REG_PACKET_CONFIG_2 = 0x31,
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REG_VERSION = 0x42
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};
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enum SX127xOpMode : uint8_t {
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MOD_FSK = 0x00,
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MOD_OOK = 0x20,
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MODE_LF_ON = 0x08,
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MODE_RX = 0x05,
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MODE_RX_FS = 0x04,
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MODE_TX = 0x03,
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MODE_TX_FS = 0x02,
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MODE_STDBY = 0x01,
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MODE_SLEEP = 0x00
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};
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enum SX127xOokPeak : uint8_t {
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BIT_SYNC_ON = 0x20,
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BIT_SYNC_OFF = 0x00,
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OOK_THRESH_AVG = 0x10,
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OOK_THRESH_PEAK = 0x08,
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OOK_THRESH_FIXED = 0x00,
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OOK_THRESH_STEP_6_0 = 0x07,
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OOK_THRESH_STEP_5_0 = 0x06,
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OOK_THRESH_STEP_4_0 = 0x05,
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OOK_THRESH_STEP_3_0 = 0x04,
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OOK_THRESH_STEP_2_0 = 0x03,
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OOK_THRESH_STEP_1_5 = 0x02,
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OOK_THRESH_STEP_1_0 = 0x01,
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OOK_THRESH_STEP_0_5 = 0x00
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};
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enum SX127xOokAvg : uint8_t {
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OOK_THRESH_DEC_16 = 0xE0,
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OOK_THRESH_DEC_8 = 0xC0,
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OOK_THRESH_DEC_4 = 0xA0,
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OOK_THRESH_DEC_2 = 0x80,
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OOK_THRESH_DEC_1_8 = 0x60,
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OOK_THRESH_DEC_1_4 = 0x40,
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OOK_THRESH_DEC_1_2 = 0x20,
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OOK_THRESH_DEC_1 = 0x00
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};
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enum SX127xRxBw : uint8_t {
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RX_BW_2_6 = 0x17,
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RX_BW_3_1 = 0x0F,
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RX_BW_3_9 = 0x07,
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RX_BW_5_2 = 0x16,
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RX_BW_6_3 = 0x0E,
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RX_BW_7_8 = 0x06,
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RX_BW_10_4 = 0x15,
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RX_BW_12_5 = 0x0D,
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RX_BW_15_6 = 0x05,
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RX_BW_20_8 = 0x14,
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||||
RX_BW_25_0 = 0x0C,
|
||||
RX_BW_31_3 = 0x04,
|
||||
RX_BW_41_7 = 0x13,
|
||||
RX_BW_50_0 = 0x0B,
|
||||
RX_BW_62_5 = 0x03,
|
||||
RX_BW_83_3 = 0x12,
|
||||
RX_BW_100_0 = 0x0A,
|
||||
RX_BW_125_0 = 0x02,
|
||||
RX_BW_166_7 = 0x11,
|
||||
RX_BW_200_0 = 0x09,
|
||||
RX_BW_250_0 = 0x01
|
||||
};
|
||||
|
||||
enum SX127xPaRamp : uint8_t {
|
||||
SHAPING_BT_0_3 = 0x60,
|
||||
SHAPING_BT_0_5 = 0x40,
|
||||
SHAPING_BT_1_0 = 0x20,
|
||||
SHAPING_NONE = 0x00,
|
||||
PA_RAMP_10 = 0x0F,
|
||||
PA_RAMP_12 = 0x0E,
|
||||
PA_RAMP_15 = 0x0D,
|
||||
PA_RAMP_20 = 0x0C,
|
||||
PA_RAMP_25 = 0x0B,
|
||||
PA_RAMP_31 = 0x0A,
|
||||
PA_RAMP_40 = 0x09,
|
||||
PA_RAMP_50 = 0x08,
|
||||
PA_RAMP_62 = 0x07,
|
||||
PA_RAMP_100 = 0x06,
|
||||
PA_RAMP_125 = 0x05,
|
||||
PA_RAMP_250 = 0x04,
|
||||
PA_RAMP_500 = 0x03,
|
||||
PA_RAMP_1000 = 0x02,
|
||||
PA_RAMP_2000 = 0x01,
|
||||
PA_RAMP_3400 = 0x00
|
||||
};
|
||||
|
||||
enum SX127xPaConfig : uint8_t { PA_PIN_RFO = 0x00, PA_PIN_BOOST = 0x80, PA_MAX_POWER = 0x70 };
|
||||
|
||||
class SX127x : public Component,
|
||||
public spi::SPIDevice<spi::BIT_ORDER_MSB_FIRST, spi::CLOCK_POLARITY_LOW, spi::CLOCK_PHASE_LEADING,
|
||||
spi::DATA_RATE_8MHZ> {
|
||||
public:
|
||||
float get_setup_priority() const override { return setup_priority::HARDWARE; }
|
||||
void setup() override;
|
||||
void dump_config() override;
|
||||
void set_rst_pin(InternalGPIOPin *rst_pin) { this->rst_pin_ = rst_pin; }
|
||||
void set_nss_pin(InternalGPIOPin *nss_pin) { this->nss_pin_ = nss_pin; }
|
||||
void set_frequency(uint32_t frequency) { this->frequency_ = frequency; }
|
||||
void set_modulation(SX127xOpMode modulation) { this->modulation_ = modulation; }
|
||||
void set_fsk_shaping(SX127xPaRamp shaping) { this->fsk_shaping_ = shaping; }
|
||||
void set_fsk_ramp(SX127xPaRamp ramp) { this->fsk_ramp_ = ramp; }
|
||||
void set_fsk_fdev(uint32_t fdev) { this->fsk_fdev_ = fdev; }
|
||||
void set_rx_start(bool start) { this->rx_start_ = start; }
|
||||
void set_rx_floor(float floor) { this->rx_floor_ = floor; }
|
||||
void set_rx_bandwidth(SX127xRxBw bandwidth) { this->rx_bandwidth_ = bandwidth; }
|
||||
void set_pa_pin(SX127xPaConfig pin) { this->pa_pin_ = pin; }
|
||||
void set_pa_power(uint32_t power) { this->pa_power_ = power; }
|
||||
void set_mode_standby();
|
||||
void set_mode_tx();
|
||||
void set_mode_rx();
|
||||
void configure();
|
||||
|
||||
protected:
|
||||
void write_register_(uint8_t reg, uint8_t value);
|
||||
uint8_t single_transfer_(uint8_t reg, uint8_t value);
|
||||
uint8_t read_register_(uint8_t reg);
|
||||
InternalGPIOPin *rst_pin_{nullptr};
|
||||
InternalGPIOPin *nss_pin_{nullptr};
|
||||
SX127xPaConfig pa_pin_;
|
||||
SX127xRxBw rx_bandwidth_;
|
||||
SX127xOpMode modulation_;
|
||||
SX127xPaRamp fsk_shaping_;
|
||||
SX127xPaRamp fsk_ramp_;
|
||||
uint32_t fsk_fdev_;
|
||||
uint32_t frequency_;
|
||||
uint32_t pa_power_;
|
||||
float rx_floor_;
|
||||
bool rx_start_;
|
||||
};
|
||||
|
||||
} // namespace sx127x
|
||||
} // namespace esphome
|
||||
Loading…
Reference in a new issue