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pulse_counter: Remove ULP self-wakeup

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Wakeup will be handled by the deep-sleep component instead
This commit is contained in:
brisk 2024-04-13 14:52:56 +09:30
parent bb0ed5b855
commit a7c68f4e08
4 changed files with 1 additions and 49 deletions
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1
esphome/components/pulse_counter/pulse_counter_sensor.cpp
View file

@ -202,7 +202,6 @@ bool UlpPulseCounterStorage::pulse_counter_setup(InternalGPIOPin *pin) {
ulp_debounce_max_count = 3; ulp_debounce_max_count = 3;
ulp_next_edge = 0; ulp_next_edge = 0;
ulp_io_number = rtcio_num; /* map from GPIO# to RTC_IO# */ ulp_io_number = rtcio_num; /* map from GPIO# to RTC_IO# */
ulp_edge_count_to_wake_up = 10;
/* Initialize selected GPIO as RTC IO, enable input */ /* Initialize selected GPIO as RTC IO, enable input */
rtc_gpio_init(gpio_num); rtc_gpio_init(gpio_num);

3
esphome/components/pulse_counter/sensor.py
View file

@ -148,9 +148,6 @@ async def to_code(config):
"ulp/pulse_cnt.S", "ulp/pulse_cnt.S",
os.path.join(os.path.dirname(__file__), "ulp/pulse_cnt.S"), os.path.join(os.path.dirname(__file__), "ulp/pulse_cnt.S"),
) )
esp32.add_extra_build_file(
"ulp/wake_up.S", os.path.join(os.path.dirname(__file__), "ulp/wake_up.S")
)
esp32.add_idf_sdkconfig_option("CONFIG_ULP_COPROC_ENABLED", True) esp32.add_idf_sdkconfig_option("CONFIG_ULP_COPROC_ENABLED", True)
esp32.add_idf_sdkconfig_option("CONFIG_ULP_COPROC_TYPE_FSM", True) esp32.add_idf_sdkconfig_option("CONFIG_ULP_COPROC_TYPE_FSM", True)
esp32.add_idf_sdkconfig_option("CONFIG_ULP_COPROC_RESERVE_MEM", 1024) esp32.add_idf_sdkconfig_option("CONFIG_ULP_COPROC_RESERVE_MEM", 1024)

15
esphome/components/pulse_counter/ulp/pulse_cnt.S
View file

@ -20,8 +20,6 @@
it expects to see the same value of input. it expects to see the same value of input.
If this condition holds true, the program increments edge_count and starts If this condition holds true, the program increments edge_count and starts
waiting for input signal polarity to change again. waiting for input signal polarity to change again.
When the edge counter reaches certain value (set by the main program),
this program running triggers a wake up from deep sleep.
*/ */
/* ULP assembly files are passed through C preprocessor first, so include directives /* ULP assembly files are passed through C preprocessor first, so include directives
@ -57,12 +55,6 @@ debounce_max_count:
edge_count: edge_count:
.long 0 .long 0
/* Number of edges to acquire before waking up the SoC.
Set by the main program. */
.global edge_count_to_wake_up
edge_count_to_wake_up:
.long 0
/* RTC IO number used to sample the input signal. /* RTC IO number used to sample the input signal.
Set by main program. */ Set by main program. */
.global io_number .global io_number
@ -152,10 +144,5 @@ edge_detected:
ld r2, r3, 0 ld r2, r3, 0
add r2, r2, 1 add r2, r2, 1
st r2, r3, 0 st r2, r3, 0
/* Compare edge_count to edge_count_to_wake_up */ /* End program */
move r3, edge_count_to_wake_up
ld r3, r3, 0
sub r3, r3, r2
jump wake_up, eq
/* Not yet. End program */
halt halt

31
esphome/components/pulse_counter/ulp/wake_up.S
View file

@ -1,31 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
/* ULP assembly files are passed through C preprocessor first, so include directives
and C macros may be used in these files
*/
#include "soc/rtc_cntl_reg.h"
#include "soc/soc_ulp.h"
#include "sdkconfig.h"
.global wake_up
wake_up:
/* Check if the system is in sleep mode */
#if CONFIG_IDF_TARGET_ESP32
READ_RTC_REG(RTC_CNTL_LOW_POWER_ST_REG, 27, 1)
#else
READ_RTC_FIELD(RTC_CNTL_LOW_POWER_ST_REG, RTC_CNTL_MAIN_STATE_IN_IDLE)
#endif
move r1, r0
/* Check if the system can be woken up */
READ_RTC_FIELD(RTC_CNTL_LOW_POWER_ST_REG, RTC_CNTL_RDY_FOR_WAKEUP)
/* If the system is in normal mode or if the system is in sleep mode with ready for wakeup set, we can signal the main CPU to wakeup */
or r0, r0, r1
jump wake_up, eq
/* Wake up the SoC, end program */
wake
halt