Add seporate bitsync config

esphome/components/sx127x/__init__.py

@@ -21,6 +21,7 @@ CONF_RX_START = "rx_start"
 CONF_RX_BANDWIDTH = "rx_bandwidth"
 CONF_RX_DURATION = "rx_duration"
 CONF_BITRATE = "bitrate"
+CONF_BITSYNC = "bitsync"
 CONF_PAYLOAD_LENGTH = "payload_length"
 CONF_PREAMBLE_SIZE = "preamble_size"
 CONF_PREAMBLE_POLARITY = "preamble_polarity"
@@ -134,6 +135,12 @@ def validate_config(config):
         raise cv.Invalid("PA power must be <= 15 dbm when using the RFO pin")
     if config[CONF_PA_PIN] == "BOOST" and config[CONF_PA_POWER] < 2:
         raise cv.Invalid("PA power must be >= 2 dbm when using the BOOST pin")
+    if CONF_BITRATE in config and CONF_BITSYNC not in config:
+        raise cv.Invalid(
+            "Bitrate is configured but not bitsync; add 'bitsync: true' for original functionality"
+        )
+    if CONF_BITSYNC in config and CONF_BITRATE not in config:
+        raise cv.Invalid("Bitsync is configured but not bitrate")
     return config
 
 
@@ -148,7 +155,8 @@ CONFIG_SCHEMA = cv.All(
             cv.Required(CONF_FREQUENCY): cv.int_range(min=137000000, max=1020000000),
             cv.Required(CONF_MODULATION): cv.enum(MOD),
             cv.Optional(CONF_SHAPING, default="NONE"): cv.enum(SHAPING),
-            cv.Optional(CONF_BITRATE, default=0): cv.int_range(min=0, max=300000),
+            cv.Optional(CONF_BITRATE): cv.int_range(min=500, max=300000),
+            cv.Optional(CONF_BITSYNC): cv.boolean,
             cv.Optional(CONF_FSK_FDEV, default=5000): cv.int_range(min=0, max=100000),
             cv.Optional(CONF_FSK_RAMP, default="40us"): cv.enum(RAMP),
             cv.Optional(CONF_SYNC_VALUE, default=[]): cv.ensure_list(cv.hex_uint8_t),
@@ -197,7 +205,14 @@ async def to_code(config):
     cg.add(var.set_frequency(config[CONF_FREQUENCY]))
     cg.add(var.set_modulation(config[CONF_MODULATION]))
     cg.add(var.set_shaping(config[CONF_SHAPING]))
+    if CONF_BITRATE in config:
         cg.add(var.set_bitrate(config[CONF_BITRATE]))
+    else:
+        cg.add(var.set_bitrate(4800))
+    if CONF_BITSYNC in config:
+        cg.add(var.set_bitsync(config[CONF_BITSYNC]))
+    else:
+        cg.add(var.set_bitsync(False))
     cg.add(var.set_payload_length(config[CONF_PAYLOAD_LENGTH]))
     cg.add(var.set_preamble_size(config[CONF_PREAMBLE_SIZE]))
     cg.add(var.set_preamble_polarity(config[CONF_PREAMBLE_POLARITY]))

esphome/components/sx127x/sx127x.cpp

@@ -85,8 +85,6 @@ void SX127x::setup() {
 }
 
 void SX127x::configure() {
-  uint8_t bit_sync = BIT_SYNC_OFF;
-
   // toggle chip reset
   this->rst_pin_->digital_write(false);
   delay(1);
@@ -118,12 +116,9 @@ void SX127x::configure() {
   this->write_register_(REG_RX_BW, this->rx_bandwidth_);
 
   // set bitrate
-  if (this->bitrate_ > 0) {
   uint64_t bitrate = (FXOSC + this->bitrate_ / 2) / this->bitrate_;  // round up
   this->write_register_(REG_BITRATE_MSB, (uint8_t) ((bitrate >> 8) & 0xFF));
   this->write_register_(REG_BITRATE_LSB, (uint8_t) ((bitrate >> 0) & 0xFF));
-    bit_sync = BIT_SYNC_ON;
-  }
 
   // configure dio mapping
   if (this->payload_length_ > 0) {
@@ -194,7 +189,8 @@ void SX127x::configure() {
   this->write_register_(REG_PREAMBLE_LSB, this->preamble_size_);
 
   // config sync generation and setup ook threshold
-  this->write_register_(REG_OOK_PEAK, bit_sync | OOK_THRESH_STEP_0_5 | OOK_THRESH_PEAK);
+  uint8_t bitsync = this->bitsync_ ? BIT_SYNC_ON : BIT_SYNC_OFF;
+  this->write_register_(REG_OOK_PEAK, bitsync | OOK_THRESH_STEP_0_5 | OOK_THRESH_PEAK);
   this->write_register_(REG_OOK_AVG, OOK_THRESH_DEC_1_8);
 
   // set rx floor
@@ -297,6 +293,7 @@ void SX127x::dump_config() {
   ESP_LOGCONFIG(TAG, "  Frequency: %f MHz", (float) this->frequency_ / 1000000);
   ESP_LOGCONFIG(TAG, "  Modulation: %s", this->modulation_ == MOD_FSK ? "FSK" : "OOK");
   ESP_LOGCONFIG(TAG, "  Bitrate: %" PRIu32 "b/s", this->bitrate_);
+  ESP_LOGCONFIG(TAG, "  Bitsync: %s", this->bitsync_ ? "true" : "false");
   ESP_LOGCONFIG(TAG, "  Rx Duration: %" PRIu32 " us", this->rx_duration_);
   ESP_LOGCONFIG(TAG, "  Rx Bandwidth: %.1f kHz", (float) rx_bw / 1000);
   ESP_LOGCONFIG(TAG, "  Rx Start: %s", this->rx_start_ ? "true" : "false");

esphome/components/sx127x/sx127x.h

@@ -228,6 +228,7 @@ class SX127x : public Component,
   void set_nss_pin(InternalGPIOPin *nss_pin) { this->nss_pin_ = nss_pin; }
   void set_frequency(uint32_t frequency) { this->frequency_ = frequency; }
   void set_bitrate(uint32_t bitrate) { this->bitrate_ = bitrate; }
+  void set_bitsync(bool bitsync) { this->bitsync_ = bitsync; }
   void set_modulation(SX127xOpMode modulation) { this->modulation_ = modulation; }
   void set_shaping(SX127xPaRamp shaping) { this->shaping_ = shaping; }
   void set_fsk_ramp(SX127xPaRamp ramp) { this->fsk_ramp_ = ramp; }
@@ -280,6 +281,7 @@ class SX127x : public Component,
   uint8_t rx_config_;
   float rx_floor_;
   bool rx_start_;
+  bool bitsync_;
 };
 
 }  // namespace sx127x