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SPI: Revert clk_pin to standard output pin schema (#6368)

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Clyde Stubbs 2024-03-14 13:42:54 +11:00 committed by GitHub
parent bbf7e2be28
commit dbf50381f1
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2 changed files with 4 additions and 16 deletions
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17
esphome/components/spi/__init__.py
View file

@ -29,7 +29,6 @@ from esphome.const import (
PLATFORM_ESP32, PLATFORM_ESP32,
PLATFORM_ESP8266, PLATFORM_ESP8266,
PLATFORM_RP2040, PLATFORM_RP2040,
CONF_ALLOW_OTHER_USES,
CONF_DATA_PINS, CONF_DATA_PINS,
) )
from esphome.core import ( from esphome.core import (
@ -199,8 +198,6 @@ def get_hw_spi(config, available):
def validate_spi_config(config): def validate_spi_config(config):
available = list(range(len(get_hw_interface_list()))) available = list(range(len(get_hw_interface_list())))
for spi in config: for spi in config:
# map pin number to schema
spi[CONF_CLK_PIN] = pins.gpio_output_pin_schema(spi[CONF_CLK_PIN])
interface = spi[CONF_INTERFACE] interface = spi[CONF_INTERFACE]
if interface == "software": if interface == "software":
pass pass
@ -257,21 +254,11 @@ def get_spi_interface(index):
return "new SPIClass(HSPI)" return "new SPIClass(HSPI)"
# Do not use a pin schema for the number, as that will trigger a pin reuse error due to duplication of the
# clock pin in the standard and quad schemas.
clk_pin_validator = cv.maybe_simple_value(
{
cv.Required(CONF_NUMBER): cv.Any(cv.int_, cv.string),
cv.Optional(CONF_ALLOW_OTHER_USES): cv.boolean,
},
key=CONF_NUMBER,
)
SPI_SCHEMA = cv.All( SPI_SCHEMA = cv.All(
cv.Schema( cv.Schema(
{ {
cv.GenerateID(): cv.declare_id(SPIComponent), cv.GenerateID(): cv.declare_id(SPIComponent),
cv.Required(CONF_CLK_PIN): clk_pin_validator, cv.Required(CONF_CLK_PIN): pins.gpio_output_pin_schema,
cv.Optional(CONF_MISO_PIN): pins.gpio_input_pin_schema, cv.Optional(CONF_MISO_PIN): pins.gpio_input_pin_schema,
cv.Optional(CONF_MOSI_PIN): pins.gpio_output_pin_schema, cv.Optional(CONF_MOSI_PIN): pins.gpio_output_pin_schema,
cv.Optional(CONF_FORCE_SW): cv.invalid( cv.Optional(CONF_FORCE_SW): cv.invalid(
@ -291,7 +278,7 @@ SPI_QUAD_SCHEMA = cv.All(
cv.Schema( cv.Schema(
{ {
cv.GenerateID(): cv.declare_id(QuadSPIComponent), cv.GenerateID(): cv.declare_id(QuadSPIComponent),
cv.Required(CONF_CLK_PIN): clk_pin_validator, cv.Required(CONF_CLK_PIN): pins.gpio_output_pin_schema,
cv.Required(CONF_DATA_PINS): cv.All( cv.Required(CONF_DATA_PINS): cv.All(
cv.ensure_list(pins.internal_gpio_output_pin_number), cv.ensure_list(pins.internal_gpio_output_pin_number),
cv.Length(min=4, max=4), cv.Length(min=4, max=4),

3
tests/components/spi/test.esp32-s3-idf.yaml
View file

@ -2,7 +2,8 @@ spi:
- id: spi_id_1 - id: spi_id_1
type: single type: single
clk_pin: clk_pin:
number: GPIO7 number: GPIO0
ignore_strapping_warning: true
allow_other_uses: false allow_other_uses: false
mosi_pin: GPIO6 mosi_pin: GPIO6
interface: hardware interface: hardware