* Add testing branch to workflow
* Add workflow
* Checkpoint
* Align SPI data rates in c++ code with Python code.
* Checkpoint
* CI fixes
* Update codeowners
* Workflow cleanup
* Rename to spi_rgb_led
* Rename header file
* Clang tidy
* Disable spi after transfer.
* Move enable() to where it belongs
* Call spi_setup before enable
* Clang tidy
* Add test
* Rename to spi_led_strip
* Include 'defines.h'
* Fix CODEOWNERS
* Migrate data rate to new style setting.
* Remove defines.h
* Fix class name
* Fix name in .py
* And more more name tidy up.
---------
Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
* Add BMI160 support
* BMI160: use set_timeout for delay
* Add support for old compilers
Fix "warning: missing terminating ' character"
* Increase power-on delay to be more conservative
* Add helper for reading little-endian data over i2c
* Replace configuration names with globals
Note: for testing with external components, you will need to comment out the import & define your own CONF_GYROSCOPE_X, etc, in this file
* Improve icons
* Fix tests & lint
* [ADC] Support measuring VCC on Raspberry Pico (W)
Added support for measuring VCC on Raspberry Pico (W) with ADC.
GPIO pin is provided as `VCC`, same as with ESP8266. VSYS is the voltage
being actually processed, and might have an offset from actual power
supply voltage (e.g. USB on VBUS) due to voltage drop on
Schottky diode between VSYS and VBUS on Rasberry Pico. The offset has
experimentally been found to be ~0.25V on Pico W and ~0.1 on Pico,
presumably due to different power consumption.
Example usage:
sensor:
- platform: adc
pin: VCC
name: "VSYS"
* + Added tests for VCC measuring on `rpipicow` board
* Checkpoint
* Checkpoint
* Checkpoint
* Revert hal change
* Checkpoint
* Checkpoint
* Checkpoint
* Checkpoint
* ESP-IDF working
* clang-format
* use bus_list
* Add spi_device; fix 16 bit transfer.
* Enable multi_conf;
Fix LSB 16 bit transactions
* Formatting fixes
* Clang-format, codeowners
* Add test
* Formatting
* clang tidy
* clang-format
* clang-tidy
* clang-format
* Checkpoint
* Checkpoint
* Checkpoint
* Revert hal change
* Checkpoint
* Checkpoint
* Checkpoint
* Checkpoint
* ESP-IDF working
* clang-format
* use bus_list
* Add spi_device; fix 16 bit transfer.
* Enable multi_conf;
Fix LSB 16 bit transactions
* Formatting fixes
* Clang-format, codeowners
* Add test
* Formatting
* clang tidy
* clang-format
* clang-tidy
* clang-format
* Clang-tidy
* Clang-format
* clang-tidy
* clang-tidy
* Fix ESP8266
* RP2040
* RP2040
* Avoid use of spi1 as id
* Refactor SPI code.
Add support for ESP-IDF hardware SPI
* Force SW only for RP2040
* Break up large transfers
* Add interface: option for spi.
validate pins in python.
* Can't use match/case with Python 3.9.
Check for inverted pins.
* Work around target_platform issue with
* Remove debug code
* Optimize write_array16
* Show errors in hex
* Only one spi on ESP32Cx variants
* Ensure bus is claimed before asserting /CS.
* Check on init/deinit
* Allow maximum rate write only SPI on GPIO MUXed pins.
* Clang-format
* Clang-tidy
* Fix issue with reads.
* Finger trouble...
* Make comment about missing SPI on Cx variants
* Pacify CI clang-format. Did not complain locally??
* Restore 8266 to its former SPI glory
* Fix per clang-format
* Move validation and choice of SPI into Python code.
* Add test for interface: config
* Fix issues found on self-review.
---------
Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
