* Pack glyph bits
* Use unsigned chars for unicode strings.
* Implement multi-bit glyphs
* clang-format
* Allow extra glyphs to be added to a font
* Allow .otf and .woff file extensions
* Add printf versions with background color;
Add tests
* Whitespace...
* Move font test to new framework
* CI fix
* CI fix
* CODEOWNERS
* File extensions tested as case-insensitive
* Add testing branch to workflow
* Add workflow
* Checkpoint
* Align SPI data rates in c++ code with Python code.
* Checkpoint
* CI fixes
* Update codeowners
* Workflow cleanup
* Rename to spi_rgb_led
* Rename header file
* Clang tidy
* Disable spi after transfer.
* Move enable() to where it belongs
* Call spi_setup before enable
* Clang tidy
* Add test
* Rename to spi_led_strip
* Include 'defines.h'
* Fix CODEOWNERS
* Migrate data rate to new style setting.
* Remove defines.h
* Fix class name
* Fix name in .py
* And more more name tidy up.
---------
Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
* Checkpoint
* Checkpoint
* Checkpoint
* Revert hal change
* Checkpoint
* Checkpoint
* Checkpoint
* Checkpoint
* ESP-IDF working
* clang-format
* use bus_list
* Add spi_device; fix 16 bit transfer.
* Enable multi_conf;
Fix LSB 16 bit transactions
* Formatting fixes
* Clang-format, codeowners
* Add test
* Formatting
* clang tidy
* clang-format
* clang-tidy
* clang-format
* Checkpoint
* Checkpoint
* Checkpoint
* Revert hal change
* Checkpoint
* Checkpoint
* Checkpoint
* Checkpoint
* ESP-IDF working
* clang-format
* use bus_list
* Add spi_device; fix 16 bit transfer.
* Enable multi_conf;
Fix LSB 16 bit transactions
* Formatting fixes
* Clang-format, codeowners
* Add test
* Formatting
* clang tidy
* clang-format
* clang-tidy
* clang-format
* Clang-tidy
* Clang-format
* clang-tidy
* clang-tidy
* Fix ESP8266
* RP2040
* RP2040
* Avoid use of spi1 as id
* Refactor SPI code.
Add support for ESP-IDF hardware SPI
* Force SW only for RP2040
* Break up large transfers
* Add interface: option for spi.
validate pins in python.
* Can't use match/case with Python 3.9.
Check for inverted pins.
* Work around target_platform issue with
* Remove debug code
* Optimize write_array16
* Show errors in hex
* Only one spi on ESP32Cx variants
* Ensure bus is claimed before asserting /CS.
* Check on init/deinit
* Allow maximum rate write only SPI on GPIO MUXed pins.
* Clang-format
* Clang-tidy
* Fix issue with reads.
* Finger trouble...
* Make comment about missing SPI on Cx variants
* Pacify CI clang-format. Did not complain locally??
* Restore 8266 to its former SPI glory
* Fix per clang-format
* Move validation and choice of SPI into Python code.
* Add test for interface: config
* Fix issues found on self-review.
---------
Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
