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https://github.com/esphome/esphome.git
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1b8d242505
* Enable use of alternate hardware UARTs for logging Enable use of Serial1 on ESP8266 and Serial1/Serial2 on ESP32 for logging. This is frequently done on ESP8266 to allow use of Serial for UART TX+RX, while maintaining logging output on Serial1 which is TX-only via GPIO2. * ESPHOMELIB_UART -> UART_SELECTION_UART; HW_UART -> HARDWARE_UART * Add test3 to travis; remove test4 * Set DEBUG_ESP_PORT based on logger UART setting
31 lines
1.1 KiB
YAML
31 lines
1.1 KiB
YAML
sudo: false
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language: python
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matrix:
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fast_finish: true
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include:
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- python: "2.7"
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env: TARGET=Lint2.7
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install: pip install -e . && pip install flake8==3.6.0 pylint==1.9.4 pillow
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script:
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- flake8 esphomeyaml
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- pylint esphomeyaml
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- python: "3.5.3"
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env: TARGET=Lint3.5
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install: pip install -U https://github.com/platformio/platformio-core/archive/develop.zip && pip install -e . && pip install flake8==3.6.0 pylint==2.2.2 pillow
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script:
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- flake8 esphomeyaml
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- pylint esphomeyaml
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- python: "2.7"
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env: TARGET=Test2.7
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install: pip install -e . && pip install flake8==3.6.0 pylint==1.9.4 pillow
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script:
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- esphomeyaml tests/test1.yaml compile
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- esphomeyaml tests/test2.yaml compile
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- esphomeyaml tests/test3.yaml compile
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#- python: "3.5.3"
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# env: TARGET=Test3.5
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# install: pip install -U https://github.com/platformio/platformio-core/archive/develop.zip && pip install -e . && pip install flake8==3.6.0 pylint==2.2.2 pillow
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# script:
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# - esphomeyaml tests/test1.yaml compile
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# - esphomeyaml tests/test2.yaml compile
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