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280 lines
14 KiB
C++
280 lines
14 KiB
C++
#pragma once
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#include "esphome/core/component.h"
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#include "esphome/core/hal.h"
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#include "esphome/core/automation.h"
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#include "esphome/components/binary_sensor/binary_sensor.h"
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#include <vector>
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namespace esphome {
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namespace rc522 {
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class RC522BinarySensor;
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class RC522Trigger;
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class RC522 : public PollingComponent {
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public:
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void setup() override;
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void dump_config() override;
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void update() override;
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float get_setup_priority() const override { return setup_priority::DATA; };
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void loop() override;
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void register_tag(RC522BinarySensor *tag) { this->binary_sensors_.push_back(tag); }
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void register_ontag_trigger(RC522Trigger *trig) { this->triggers_ontag_.push_back(trig); }
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void register_ontagremoved_trigger(RC522Trigger *trig) { this->triggers_ontagremoved_.push_back(trig); }
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void set_reset_pin(GPIOPin *reset) { this->reset_pin_ = reset; }
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protected:
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// Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
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// last value set to 0xff, then compiler uses less ram, it seems some optimisations are triggered
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enum StatusCode : uint8_t {
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STATUS_OK, // Success
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STATUS_WAITING, // Waiting result from RC522 chip
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STATUS_ERROR, // Error in communication
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STATUS_COLLISION, // Collision detected
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STATUS_TIMEOUT, // Timeout in communication.
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STATUS_NO_ROOM, // A buffer is not big enough.
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STATUS_INTERNAL_ERROR, // Internal error in the code. Should not happen ;-)
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STATUS_INVALID, // Invalid argument.
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STATUS_CRC_WRONG, // The CRC_A does not match
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STATUS_MIFARE_NACK = 0xff // A MIFARE PICC responded with NAK.
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};
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enum State {
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STATE_NONE = 0,
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STATE_SETUP,
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STATE_INIT,
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STATE_PICC_REQUEST_A,
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STATE_READ_SERIAL,
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STATE_SELECT_SERIAL,
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STATE_SELECT_SERIAL_DONE,
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STATE_READ_SERIAL_DONE,
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STATE_DONE,
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} state_{STATE_NONE};
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enum PcdRegister : uint8_t {
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// Page 0: Command and status
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// 0x00 // reserved for future use
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COMMAND_REG = 0x01 << 1, // starts and stops command execution
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COM_I_EN_REG = 0x02 << 1, // enable and disable interrupt request control bits
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DIV_I_EN_REG = 0x03 << 1, // enable and disable interrupt request control bits
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COM_IRQ_REG = 0x04 << 1, // interrupt request bits
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DIV_IRQ_REG = 0x05 << 1, // interrupt request bits
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ERROR_REG = 0x06 << 1, // error bits showing the error status of the last command executed
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STATUS1_REG = 0x07 << 1, // communication status bits
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STATUS2_REG = 0x08 << 1, // receiver and transmitter status bits
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FIFO_DATA_REG = 0x09 << 1, // input and output of 64 uint8_t FIFO buffer
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FIFO_LEVEL_REG = 0x0A << 1, // number of uint8_ts stored in the FIFO buffer
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WATER_LEVEL_REG = 0x0B << 1, // level for FIFO underflow and overflow warning
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CONTROL_REG = 0x0C << 1, // miscellaneous control registers
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BIT_FRAMING_REG = 0x0D << 1, // adjustments for bit-oriented frames
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COLL_REG = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
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// 0x0F // reserved for future use
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// Page 1: Command
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// 0x10 // reserved for future use
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MODE_REG = 0x11 << 1, // defines general modes for transmitting and receiving
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TX_MODE_REG = 0x12 << 1, // defines transmission data rate and framing
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RX_MODE_REG = 0x13 << 1, // defines reception data rate and framing
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TX_CONTROL_REG = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
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TX_ASK_REG = 0x15 << 1, // controls the setting of the transmission modulation
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TX_SEL_REG = 0x16 << 1, // selects the internal sources for the antenna driver
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RX_SEL_REG = 0x17 << 1, // selects internal receiver settings
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RX_THRESHOLD_REG = 0x18 << 1, // selects thresholds for the bit decoder
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DEMOD_REG = 0x19 << 1, // defines demodulator settings
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// 0x1A // reserved for future use
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// 0x1B // reserved for future use
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MF_TX_REG = 0x1C << 1, // controls some MIFARE communication transmit parameters
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MF_RX_REG = 0x1D << 1, // controls some MIFARE communication receive parameters
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// 0x1E // reserved for future use
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SERIAL_SPEED_REG = 0x1F << 1, // selects the speed of the serial UART interface
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// Page 2: Configuration
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// 0x20 // reserved for future use
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CRC_RESULT_REG_H = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
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CRC_RESULT_REG_L = 0x22 << 1,
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// 0x23 // reserved for future use
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MOD_WIDTH_REG = 0x24 << 1, // controls the ModWidth setting?
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// 0x25 // reserved for future use
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RF_CFG_REG = 0x26 << 1, // configures the receiver gain
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GS_N_REG = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
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CW_GS_P_REG = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
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MOD_GS_P_REG = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
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T_MODE_REG = 0x2A << 1, // defines settings for the internal timer
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T_PRESCALER_REG = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
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T_RELOAD_REG_H = 0x2C << 1, // defines the 16-bit timer reload value
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T_RELOAD_REG_L = 0x2D << 1,
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T_COUNTER_VALUE_REG_H = 0x2E << 1, // shows the 16-bit timer value
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T_COUNTER_VALUE_REG_L = 0x2F << 1,
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// Page 3: Test Registers
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// 0x30 // reserved for future use
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TEST_SEL1_REG = 0x31 << 1, // general test signal configuration
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TEST_SEL2_REG = 0x32 << 1, // general test signal configuration
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TEST_PIN_EN_REG = 0x33 << 1, // enables pin output driver on pins D1 to D7
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TEST_PIN_VALUE_REG = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
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TEST_BUS_REG = 0x35 << 1, // shows the status of the internal test bus
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AUTO_TEST_REG = 0x36 << 1, // controls the digital self-test
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VERSION_REG = 0x37 << 1, // shows the software version
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ANALOG_TEST_REG = 0x38 << 1, // controls the pins AUX1 and AUX2
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TEST_DA_C1_REG = 0x39 << 1, // defines the test value for TestDAC1
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TEST_DA_C2_REG = 0x3A << 1, // defines the test value for TestDAC2
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TEST_ADC_REG = 0x3B << 1 // shows the value of ADC I and Q channels
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// 0x3C // reserved for production tests
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// 0x3D // reserved for production tests
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// 0x3E // reserved for production tests
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// 0x3F // reserved for production tests
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};
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// MFRC522 commands. Described in chapter 10 of the datasheet.
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enum PcdCommand : uint8_t {
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PCD_IDLE = 0x00, // no action, cancels current command execution
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PCD_MEM = 0x01, // stores 25 uint8_ts into the internal buffer
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PCD_GENERATE_RANDOM_ID = 0x02, // generates a 10-uint8_t random ID number
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PCD_CALC_CRC = 0x03, // activates the CRC coprocessor or performs a self-test
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PCD_TRANSMIT = 0x04, // transmits data from the FIFO buffer
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PCD_NO_CMD_CHANGE = 0x07, // no command change, can be used to modify the CommandReg register bits without
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// affecting the command, for example, the PowerDown bit
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PCD_RECEIVE = 0x08, // activates the receiver circuits
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PCD_TRANSCEIVE =
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0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
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PCD_MF_AUTHENT = 0x0E, // performs the MIFARE standard authentication as a reader
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PCD_SOFT_RESET = 0x0F // resets the MFRC522
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};
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// Commands sent to the PICC.
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enum PiccCommand : uint8_t {
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// The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
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PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for
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// anticollision or selection. 7 bit frame.
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PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and
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// prepare for anticollision or selection. 7 bit frame.
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PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
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PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
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PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 2
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PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 3
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PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
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PICC_CMD_RATS = 0xE0, // Request command for Answer To Reset.
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// The commands used for MIFARE Classic (from http://www.mouser.com/ds/2/302/MF1S503x-89574.pdf, Section 9)
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// Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on
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// the sector.
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// The read/write commands can also be used for MIFARE Ultralight.
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PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
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PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
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PICC_CMD_MF_READ =
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0x30, // Reads one 16 uint8_t block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
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PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 uint8_t block to the authenticated sector of the PICC. Called
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// "COMPATIBILITY WRITE" for MIFARE Ultralight.
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PICC_CMD_MF_DECREMENT =
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0xC0, // Decrements the contents of a block and stores the result in the internal data register.
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PICC_CMD_MF_INCREMENT =
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0xC1, // Increments the contents of a block and stores the result in the internal data register.
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PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
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PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
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// The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
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// The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
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PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 uint8_t page to the PICC.
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};
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void pcd_reset_();
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void initialize_();
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void pcd_antenna_on_();
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void pcd_antenna_off_();
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virtual uint8_t pcd_read_register(PcdRegister reg ///< The register to read from. One of the PCD_Register enums.
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) = 0;
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/**
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* Reads a number of uint8_ts from the specified register in the MFRC522 chip.
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* The interface is described in the datasheet section 8.1.2.
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*/
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virtual void pcd_read_register(PcdRegister reg, ///< The register to read from. One of the PCD_Register enums.
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uint8_t count, ///< The number of uint8_ts to read
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uint8_t *values, ///< uint8_t array to store the values in.
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uint8_t rx_align ///< Only bit positions rxAlign..7 in values[0] are updated.
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) = 0;
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virtual void pcd_write_register(PcdRegister reg, ///< The register to write to. One of the PCD_Register enums.
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uint8_t value ///< The value to write.
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) = 0;
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/**
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* Writes a number of uint8_ts to the specified register in the MFRC522 chip.
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* The interface is described in the datasheet section 8.1.2.
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*/
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virtual void pcd_write_register(PcdRegister reg, ///< The register to write to. One of the PCD_Register enums.
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uint8_t count, ///< The number of uint8_ts to write to the register
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uint8_t *values ///< The values to write. uint8_t array.
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) = 0;
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void pcd_set_register_bit_mask_(PcdRegister reg, ///< The register to update. One of the PCD_Register enums.
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uint8_t mask ///< The bits to set.
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);
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void pcd_clear_register_bit_mask_(PcdRegister reg, ///< The register to update. One of the PCD_Register enums.
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uint8_t mask ///< The bits to clear.
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);
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void pcd_transceive_data_(uint8_t send_len);
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void pcd_calculate_crc_(uint8_t *data, ///< In: Pointer to the data to transfer to the FIFO for CRC calculation.
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uint8_t length ///< In: The number of uint8_ts to transfer.
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);
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bool awaiting_comm_;
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uint32_t awaiting_comm_time_;
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StatusCode await_transceive_();
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StatusCode await_crc_();
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uint8_t buffer_[9]; ///< buffer for communication, the first bits [0..back_idx-1] are for tx ,
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///< [back_idx..back_idx+back_len] for rx
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uint8_t send_len_; // index of first byte for RX
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uint8_t back_length_; ///< In: Max number of uint8_ts to write to *backData. Out: The number of uint8_ts returned.
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uint8_t uid_buffer_[10]; // buffer to construct the uid (for 7 and 10 bit uids)
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uint8_t uid_idx_ = 0; // number of read uid bytes e.g. index of the next available position in uid_buffer
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uint8_t error_counter_ = 0; // to reset if unresponsive
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uint8_t rx_align_;
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uint8_t *valid_bits_;
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GPIOPin *reset_pin_{nullptr};
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uint8_t reset_count_{0};
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uint32_t reset_timeout_{0};
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std::vector<RC522BinarySensor *> binary_sensors_;
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std::vector<RC522Trigger *> triggers_ontag_;
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std::vector<RC522Trigger *> triggers_ontagremoved_;
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std::vector<uint8_t> current_uid_;
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enum RC522Error {
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NONE = 0,
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RESET_FAILED,
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} error_code_{NONE};
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};
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class RC522BinarySensor : public binary_sensor::BinarySensor {
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public:
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void set_uid(const std::vector<uint8_t> &uid) { uid_ = uid; }
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bool process(std::vector<uint8_t> &data);
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void on_scan_end() {
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if (!this->found_) {
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this->publish_state(false);
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}
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this->found_ = false;
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}
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protected:
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std::vector<uint8_t> uid_;
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bool found_{false};
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};
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class RC522Trigger : public Trigger<std::string> {
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public:
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void process(std::vector<uint8_t> &data);
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};
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} // namespace rc522
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} // namespace esphome
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